Reconfigurable filed effect transistors (R-FETs) that can dynamically reconfigure the transistor polarity, from n-type to p-type channel or vice versa, represent a promising new approach to reduce the logic complexity and granularity of programmable electronics. Though R-FETs have been successfully demonstrated upon silicon nanowire (SiNW) channels, a pair of extra program gates are still needed to control the source/drain (S/D) contacts. In this work, we propose a rather simple single-gated R-FET structure with an asymmetric S/D electrode contact, where the FET channel polarity can be altered by changing the sign of channel bias V_ds. These R-FETs were fabricated upon an orderly array of planar SiNW channels, grown via in-plane solid-liquid-solid mechanism, and contacted by Ti/Al and Pt/Au at the S/D electrodes, respectively. Remarkably, this channel-bias-controlled R-FET strategy has been successfully testified and implemented upon both p-type (with indium dopants) or n-type (phosphorus) doped SiNW channels, while the R-FET prototypes demonstrate an impressive high I_on/off ratio >10⁶ and a steep subthreshold swing (SS) of 79 mV dec^-1. These results indicate a rather simple but generic enough R-FET strategy of SiNW-based electronics for the construction of a new generation of programmable, flexible and low-power logics and memories.